Technical Bulletin 2016

PROTECTING A MULTI-DROP DATA/CONTROL SYSTEM


DEFINITIONS

CPU Main Processing Equipment SP Data/Control Surge Protector (PC642 as Examples)
E Local Electronic Equipment MPP Main Power Panel

Question:

     What is wrong with the diagram (figure 1) below?


Answer:

     1. The SP's located at the cable building entrance, are improperly position to protect the CPU and E's. Remember that during lightning activity, ground potentials at opposite ends of a building (such as Building 2) can be thousands of volts apart. This allows damage to E's inside the building.

     2. The series resistance of the SP's is additive in Figure 1. Five protectors are encountered over the length of the data line in the above illustration. The total series resistance often is too great for property system performance.

Question:

     What is the proper way to configure surge protection on a Multi-Drop System such as this?

Answer:

Connect (locate) the SP's on each individual E drop so that the SP is NOT in series with the main data line. The resistances of the SP's do not add when connected as illustrated in Figure 2. In addition, it is preferable to locate the SP's near the respective E's to be protected. This is especially important if the individual E's are "plugged into" 120 VAC power.

Question:

     What do I do if there is no practical way to install an SP at each individual E's such as a retrofit; or the E's are powered down the cabling and there is no local ground at the E's?

Answer:

    Figure 3 illustrates an alternate method of installation where the E's in a given building are connected to the main data cable only at one point (at the SP). If the individual E's are "plugged into" 120 VAC power, then it is essential that the SP for the building be located at the main power panel and grounded directly to its ground conductor. The inter-building data cable should Tee tap at te SP. In all cases it is preferred to locate the SP in Figure 3 near the main power panel. Note that an SP always needs to be located at the CPU. Figure is the preferred method.


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